VPX Timing Card
The VPX Timing Clock offers a complete solution set for all PNT needs. This highly ruggedized conduction cooled unit provides a versatile multifunction clock references for any environment.
This fully defined, backplane-centric VPX module optionally supports either commercial GNSS receivers (i.e. U-Blox), or secure SAASM M-Code GPS receiver data along with external 1PPS UTC rollover references, reference clocks of up to 100MHz, as well as Amplitude Modulated (AM) or DC Level Shifted AM (DCLS) IRIG inputs as means of synchronization via the VITA 67.3C backplane RF connector.
Features
- SOSA Aligned
- 3U VPX Form-Factor
- Reduced SWaP applications
- Ruggedization Level 200
- 11 Radial Clock Outputs
- OpenVPX Backplane support for 1000BASE-KX or 10GBASE-KR
- Optional Chip Scale Atomic Clock (CSAC) Holdover
- Optional Low Phase Noise (LPN) Analog output
- Optional secure GPS (M-code)
- Optional Timecode I/O
The VPX Timing Clock provides three (3) 1000BASE-KX Ethernet ports, with optional software upgrade for faster 10GBASE-KR.
The module provides PTP (IEEE 1588-2008) and NTP functionality (RFC 5905) with both server and client capabilities.
In its default configuration, the VPX Time Clock employs a highly stable VCOCXO to serve the backplane with multiple (11+11) coherent disciplined clocks aligned with PPS pairs. This oscillator can be upgraded with an ultra-low phase noise option for best-in-class short term stability.
The radial clocks have a maximum group skew of ±25 picosecond between pairs, while the PPS inputs to outputs phase alignment is maintained within ±10ns. Furthermore, each clock phase can be further tuned within ±25 picoseconds to calibrate module radial clock routing.
The module can be optionally configured with a CSAC for enhanced holdover accuracy while operating in reference-denied environments. As an added feature the raw GNSS data can be distributed via multicast from the module for downstream processing.
The module can be optionally configured with a timecode I/O module. Developed variants include: IRIG-AM, IRIG-DCLS, BCD (24-bit and 40-bit), NMEA, and MIL-STD-1553.
To facilitate higher level integration, selected 3rd party source code is available to build status and control applications software on platforms running almost any operating system. e.g. Single Board Computer (SBC). Applications connect using gRPC over HTTP via Ethernet or even locally using RS-232 console access via localhost.
Specifications
General Input Specifications
| 1PPS stability to GPS time | ± 53ns |
| 1PPS Stability to UTC Time | ± 200ns |
| Frequency Stability (CSAC) | 3x10-10 |
| Phase Accuracy, 100MHz to 1PPS | ± 10ns |
| Holdover | ± 26µs over 24 hours |
| Long Term Oscillator Aging without GPS | Aging, monthly: <3x10-10 Aging, yearly: <1x10-9 |
| Serial Controls to CSAC, SAASM GPS (optional) | 3.3V |
| SAASM Key-Zeroize | CMOS RS232 message to SAASM GPS |
| External GPS Antenna Connection | Active 3.3V Antenna, L1 and L2, Maxtenna |
| GNSS Receiver – SAASM GPS (optional) | 12 channels, L1 and L2, SAASM, DS101 Key and zeroize |
General Output Specifications
| VITA 67.3C Connector Output | 10/100 MHz RF |
| Backplane Radial Clocks | 11 Individually programmable output clocks |
| Backplane Radial Output Clock Frequency | 3-3000 MHz |
| 1PPS Output | LVDS, 1.125 to 1.375 offset, Vod 250-450mV |
| 100MHz output | LVDS, 1.125 to 1.375 offset, Vod 250-450mV |
Environmental
| Size | 3U VPX CC |
| Warm Up Time | <4 minutes |
| Power Consumption (with SAASM GPS) | Typ: 11.4W Max: 12.1W |
| Power Consumption | Typ: 10.9W Max: 11.6W |
| Operating Temperature | -40°C to +85°C |
| G-sensitivity | MIL-STD-810, Method 514.6, Figure 514.6E-1, 7.7 gRMS, (General Minimum Integrity Exposure) |
